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512k x 8 bi t low power cmos sram features a ccess time : 55 ns low power consumption: operating current : 30/20ma (typ.) s tandby current : 4 a (typ.) c-version single 2.7v ~ 5.5v power supply fully static operation t ri-state output da ta retention voltage : 2.0v (min.) all products rohs compliant package : 3 2 -pi n 4 5 0 mi l sop 32-p i n 8m m x 20m m tso p -i 32-p i n 8m m x 13.4mm stsop * 36- b all 6m m x 8m m tfbga * genera l descri p tion : 32-p i n 600 mil p-dip the as6c4008 is a 4,194,304-bit low power cmos static random access memory organized as 524,2 88 words by 8 bits. it is fabricated using very high performance, high reliability cmos technology. i ts standby current is stable within the range of operating temperature. the as6c4008 is well designed for very low power system applications, and particularly well suited for battery back-up non -volatile memory application. t he as6c4008 operates f rom a single power s upply of 2.7v ~ 5.5v . functiona l block diagram d e c o d e r i / o d a t a c i r c u i t c o n t r o l c i r c u i t 5 1 2 k x 8 m e m o r y a r r a y c o l u m n i / o a 0 - a 1 8 v c c v s s d q 0 - d q 7 c e # w e # o e # pin de s c ription ** symbol description a0 - a18 addr e s s inp u t s dq0 ? dq7 da t a in p u t s / outpu t s ce# chip en a ble inpu t s we# w r ite en a ble input oe# output enab l e input v c c pow e r supp l y v ss g ro u nd nc no c on n ecti o n january 2007 512k x 8 bit low power cmos sram c o m i n g s o o n ! fully compatible with all competitors 5v product fully compatible with all competitors 3.3v product october 2007 as6c4008 10/october/07, v.1.1 alliance memory inc. page 1 of 1
pin configur a tion a 1 2 a 7 a 6 a 5 a 4 a 3 a 2 a 1 a 0 d q 0 d q 1 d q 2 v s s a 1 4 v c c a 8 a 9 a 11 a 1 0 d q 7 d q 6 d q 5 d q 4 d q 3 as6c4008 s o p /p-dip 2 8 14 13 12 11 10 9 8 7 6 5 4 3 2 1 1 7 16 15 2 0 1 9 1 8 2 2 2 3 2 4 2 5 2 6 2 7 2 1 a 13 c e # o e# w e # a 1 6 a 1 8 2 9 3 2 3 0 3 1 a 17 a 15 t s o p - i/ stsop d q 3 a 1 1 a9 a8 a 1 3 d q 2 a10 a 1 4 a 1 2 a7 a6 a5 v c c d q 7 d q 6 d q 5 d q 4 v s s d q 1 d q 0 a 0 a 1 a 2 a4 a 3 as6c4008 28 14 13 12 11 10 9 8 7 6 5 4 3 2 1 17 16 15 20 19 18 22 23 24 25 26 27 21 o e # w e # c e # a 1 7 a 1 5 a 1 6 a 1 8 32 31 29 30 tfbg a o e # w e # a 1 2 a 1 1 a 1 3 n c a 1 8 a 1 0 a 1 4 a 1 5 d q 5 d q 6 d q 7 a 9 v s s a 8 a 1 6 d q 4 v c c v c c d q 3 a 1 7 v s s a 7 a 0 d q 2 d q 1 d q 0 a 6 a 1 a 3 a 5 n c a 4 a 2 1 2 3 4 5 6 h g c d e f a b ce# ? 512k x 8 bit low power cmos sram october 2007 as6c4008 10/october/07, v.1.1 alliance memory inc. page 2 of 15
absolu t e maximu m r a tin g s* p a ramet e r symbol r a ting unit t erminal v ol t age with r e spect to v ss v t e r m -0.5 to 6.5 v 0 to 70(c g r a de) t e r u t a r e p m e t g n i t a r e p o a -40 to 8 5 (i grade) t e r u t a r e p m e t e g a r o t s s t g -65 to 150 oc oc p n o i t a p i s s i d r e w o p d 1 w i t n e r r u c t u p t u o c d o u t 50 ma solder i ng t e mperature ( u nder 1 0 s e c) t so l d er 260 oc * s tresses greater than those listed under ?absolute maximum rat i ngs ? m a y cause permanen t dam a ge t o t he device . t his is a s t ress rating on l y a n d f u nctional operation of the device o r a n y ot h er conditions above t hose indi c a t ed in t he opera t ional sec t ions of t his spe c i f i c a t ion is n o t implied. e x posure t o the absolute maximum r ating conditions for extende d period m a y a f f ect de v i c e reliabi l i t y . t r u t h t a b l e mode ce# oe# we# i/o operat i on supp l y c u rr e nt s t andby h x x high-z i sb1 output d i sab l e l h h hig h -z i c c , i c c 1 re a d l l h d o u t i c c , i c c 1 w r i t e l x l d i n i c c , i c c 1 note: h = v i h , l = v i l , x = don' t care. dc el e c t r ical charact e r istics p a r a m e t e r symbol test co n d i tion min. ty p . *3 max. unit supply v ol t a g e v c c v 5 . 5 0 . 3 7 . 2 input high v o l t age v i h *1 v * 7 . 0 c c - v c c + 0 . 3 v input low v o l t age v i l *1 v 6 . 0 - 2 . 0 - input le a ka g e curr e nt i li v c c R v i n R v ss - 1 - 1 a output le a k a ge cu r r e nt i lo v c c R v o u t R v ss , output d i sab l ed - 1 - 1 a output hi g h v ol t age v oh i oh v - - 4 . 2 a m 1 - = output l o w v ol t age v ol i ol = 2ma - - 0.4 v - 55 - 30 60 m a i c c cycle time = min. ce# = 0.2 v , i i / o = 0m a o ther p i ns at 0.2v or v c c - 0.2v a v erage o p e r ating pow e r s u ppl y curren t i c c 1 cy c le time = 1 s ce# = 0.2 v , i i / o = 0m a other pi n s at 0.2v or v c c - 0.2v - 4 1 0 ma * c 4 50 *4 a s t andby power supply c u rr e nt i sb1 ce# v R c c - 0.2v * i 4 50 *4 a notes: 1. v i h (max) = v c c + 3 . 0 v f or pul s e w i d th le s s t han 10ns . v i l (m i n) = v s s - 3.0v for pulse w i d t h less than 10ns. 2. over/ u nders h oot specifications are charact e rized, not 10 0 % tes t ed. 3. t y pical values are included for r eference on l y a n d are not g uara n t eed or tested. t y pical valued are measured a t v c c = v c c ( t y p .) a nd t a = 2 5 oc 4. 25 a f or s pe c ial reque s t *c=commercial temperature/i = industrial temperature ? - - 512k x 8 bit low power cmos sram october 2007 as6c4008 10/october/07, v.1.1 alliance memory inc. page 3 of 15
write c y cle 1 (we# controlled) (1,2,3,5,6) dou t di n data vali d t d w t d h ( 4 ) hig h -z t w h z we# t w p t c w ce # t w r t a s t a w a d d r ess t w c ( 4 ) t ow write c y cle 2 (ce# controlled) (1,2,5,6) dou t d i n data vali d t d w t d h ( 4 ) hig h -z t w h z we# t w p t c w ce # t w r t a s t a w a d d r ess t w c no t e s : 1 .we # , c e # m u st be high du r ing all add r e ss tr an s i t ion s. 2 . a w r i t e occurs during t he overl a p o f a l o w ce# , l o w w e# . 3 . during a w e# con t rolled wri t e c y cle w i t h o e# l o w , t w p must be greater t han t w h z + t d w to allo w t h e drivers to turn o f f and da t a to b e placed on the b u s. 4.during this per i od, i/o pins a r e in the out pu t s t a t e , and inpu t s ignals mus t no t be applied . 5 .if t he c e # l o w t r an s i t ion o cc ur s s imul t aneou s l y wi t h or a f t er we # l o w t ran s i t ion , t h e ou t pu t s remain i n a high impeda n c e s t at e. 6.t o w and t w h z a r e s pe c i f ied w i t h c l = 5p f . t r an s i t ion i s measured 500m v f rom st e ad y s t a t e. ? 512k x 8 bit low power cmos sram october 2007 as6c4008 10/october/07, v.1.1 alliance memory inc. page 4 of 15
re v . 1.1 512k x 8 bi t low power cmos sram notes: 1. v i h (ma x ) = v c c + 3 . 0 v f or pul s e w i d t h le s s t han 10n s. 2. v i l (m i n) = v s s - 3.0v for pulse w i d th less than 1 0ns. 3. over/ u nders h oot specifications are charact e rized, not 10 0 % tes t ed. 4. t y pical values are included for r eference on l y a n d are not g uara nt eed or tested. t y pical valued are measured a t v c c = v c c ( t y p .) a nd t a = 2 5 ? ca p aci t a nc e ( t a = 2 5 , f = 1.0 m hz) p a r a met e r symbol min. max unit c e c n a t i c a p a c t u p n i i n - 6 pf input/output c a p a ci t a n c e c i / o - 8 pf note : these p a r ameters are gua r anteed b y devic e characterization, but not p r oduction tested. ac te s t conditions v o t v 2 . 0 s l e v e l e s l u p t u p n i c c - 0.2v s n 3 s e m i t l l a f d n a e s i r t u p n i input and ou t put t i ming refere n c e l evels 1.5v c d a o l t u p t u o l = 3 0 pf + 1ttl, i oh / i ol = -1ma/2m a ac el e c t r ica l charact e r istics ( 1 ) r e a d c y c l e as6c4008 - 5 5 p a r a m e t e r sym . min . max . min . max . min. max. unit re a d c y c l e t i me t r c 55 - ns a dd r e s s a c c e ss t i m e t aa - 55 ns chip enable access t ime t ac e - 55 ns output enab l e access t i m e t oe - 30 ns chip enable to output in low-z t cl z * 10 - ns output enab l e to output in low-z t olz * 5 - ns chip disable to output in hig h -z t ch z * - 20 ns output d i sab l e to output in high-z t oh z * - 20 ns output ho l d from ad d r e ss ch a nge t oh 10 - ns (2) write c y cle as6c4008 - 5 5 p a ramet e r sym. min . max . min . max . min. max. unit w r ite cycle t i me t w c 55 - ns addr e s s v ali d to end of w r ite t a w 50 - ns chip en a ble to end of w r i t e t c w 50 - ns addr e s s set-up t i me t as 0 - ns w r ite pu l s e wi d t h t w p 45 - ns w r i t e r e c o v e r y t i m e t w r 0 - ns da t a t o w r i t e t ime o verlap t d w 25 - ns da t a hold fr o m end of w r i t e t i me t d h 0 - ns output activ e from end of w r ite t o w * 5 - ns w r ite to output in high-z t w h z * - 20 ns *these p ar a met e rs are gu a rante e d b y device cha r acterization, but not production t e sted. as6c4008 10 october 2007, v 1.1 alliance memory inc., page 5 of 15 october 2007
timing w a veforms re a d c y c l e 1 (addr e s s controlle d ) ( 1 ,2) dou t data vali d t oh t a a a d d r ess t r c pre v iou s data vali d re a d c y c l e 2 (ce# an d oe# control l ed) (1,3,4,5) dou t da t a v a li d t oh oe # t a c e ce # t a a a d d r ess t r c hig h - z high - z t cl z t o l z t oe t c h z t o h z no t e s : 1.we # is high for read c y cle. 2.device is continuous l y selected oe# = lo w , ce# = lo w . 3 .a ddre s s mu st be v alid prior t o o r coin c iden t w i t h c e # = low , ; o t he r w i se t a a is the limiting p aramete r . 4.t c l z , t o l z , t ch z and t ohz are sp e c ified w i th c l = 5p f . t r ansition is measured 5 00 m v from stea d y s t ate. 5.at a n y given t e mperat u r e and v ol t age condition, t ch z is less than t c l z , t o h z is less t han t o l z . ? 512k x 8 bit low power cmos sram october 2007 as6c4008 10/october/07, v.1.1 alliance memory inc. page 6 of 15
write c y cle 1 (we# controlled) (1,2,3,5,6) dou t di n data vali d t d w t d h ( 4 ) hig h -z t w h z we# t w p t c w ce # t w r t a s t a w a d d r ess t w c ( 4 ) t ow write c y cle 2 (ce# controlled) (1,2,5,6) dou t d i n data vali d t d w t d h ( 4 ) hig h -z t w h z we# t w p t c w ce # t w r t a s t a w a d d r ess t w c no t e s : 1 .we # , c e # m u st be high du r ing all add r e ss tr an s i t ion s. 2 . a w r i t e occurs during t he overl a p o f a l o w ce# , l o w w e# . 3 . during a w e# con t rolled wri t e c y cle w i t h o e# l o w , t w p must be greater t han t w h z + t d w to allo w t h e drivers to turn o f f and da t a to b e placed on the b u s. 4.during this per i od, i/o pins a r e in the out pu t s t a t e , and inpu t s ignals mus t no t be applied . 5 .if t he c e # l o w t r an s i t ion o cc ur s s imul t aneou s l y wi t h or a f t er we # l o w t ran s i t ion , t h e ou t pu t s remain i n a high impeda n c e s t at e. 6.t o w and t w h z a r e s pe c i f ied w i t h c l = 5p f . t r an s i t ion i s measured 500m v f rom st e ad y s t a t e. ? 512k x 8 bit low power cmos sram october 2007 as6c4008 10/october/07, v.1.1 alliance memory inc. page 7 of 15
d a t a re t e ntion charac t e r istics p a r a met e r symbol test co n d i tion min. ty p . max. unit v cc for da t a retention v d r ce# v R c c - 0.2 v 2.0 - 5.5 v * * c - 2 3 0 da t a retenti o n cu r r e n t d r v c c = 2.0v ce# v R c c - 0.2v ** i - 2 30 a chip di s able to da t a retenti o n t i me t c d r see da t a re t ention w avef o r m s (bel o w ) 0 - - ns r e c o v e r y t i m e t r t r c * - - n s t r c * = r e a d c y c l e t i m e **c=commercial temperature/i=industrial temperature d a t a re t e ntion w a v e form vcc ce# v d r R 2 . 0 v c e # v R c c - 0 . 2 v vc c ( min.) v i h t r t c d r v i h v c c ( m i n . ) ? i 512k x 8 bit low power cmos sram october 2007 as6c4008 10/october/07, v.1.1 alliance memory inc. page 8 of 15
p a ckag e outline dimension 32 pin 450 m il so p package outline dimension unit s y m . inch.(base ) mm(r e f) a 0. 1 18 (max) 2.997 (max) a1 0.004(min) 0.102(min) a2 0. 1 1 1(ma x ) 2.82(max) b 0.016(typ) 0.406(typ) c 0.008(typ) 0.203(typ) d 0.817(max) 20.75(max) e 0.445 0.00 5 1 1.3 0 3 0.1 2 7 e1 0.555 0.01 2 14.097 0.3 0 5 e 0.050(typ) 1.270(typ) l 0.0347 0.0 0 8 0.881 0.20 3 l1 0.055 0.00 8 1.397 0.20 3 s 0 . 026 (max) 0 . 660 (max) y 0.004(max) 0.101(max) 0 o -10 o 0 o -10 o ? 512k x 8 bit low power cmos sram october 2007 as6c4008 10/october/07, v.1.1 alliance memory inc. page 9 of 1
32 pin 8mm x 20mm tsop-i package outline di m ension unit s y m . inch(base ) mm(r e f) a 0.047 (max) 1.20 (max) a1 0.004 0.00 2 0.10 0.05 a2 0.039 0.00 2 1.00 0.05 b 0.008 + 0. 00 2 - 0.001 0.20 + 0.05 -0.03 c 0.005 (ty p ) 0.127 (ty p ) d 0.724 0.00 4 18.40 0.1 0 e 0.315 0.00 4 8.00 0.10 e 0.020 (ty p ) 0.50 (typ) h d 0.787 0.00 8 20.00 0.2 0 l 0.0197 0.0 0 4 0.50 0.10 l1 0.0315 0.0 0 4 0.08 0.10 y 0.003 (max) 0.076 (max) 0 o 5 o 0 o 5 o ? 512k x 8 bit low power cmos sram october 2007 as6c4008 10/october/07, v.1.1 alliance memory inc. page 10 of 15
32 pin 8mm x 13.4mm s tsop package outline dimension 1 1 6 1 7 3 2 c l h d d "a " e e 1 2 ( 2 x ) 1 2 ( 2 x ) s ea t i n g p l a n e y 3 2 1 7 1 6 1 c a 2 a 1 l a 0 . 2 5 4 0 gauge p l an e 1 2 ( 2 x ) 1 2 ( 2 x ) s ea t ing pl a n e "a" d e t a i l vi e w l 1 b unit s y m . inch(base ) mm(r e f) a 0.049 (max) 1.25 (max) a1 0.005 0.00 2 0.130 0.0 5 a2 0.039 0.00 2 1.00 0.05 b 0.008 0.0 1 0.20 0.025 c 0.005 (ty p ) 0.127 (ty p ) d 0.465 0.00 4 1 1.80 0.1 0 e 0.315 0.00 4 8.00 0.10 e 0.020 (ty p ) 0.50 (typ) h d 0.528 0.0 08 13.40 0.20 . l 0.0197 0.0 0 4 0.50 0.10 l1 0.0315 0.0 0 4 0.8 0.10 y 0.003 (max) 0.076 (max) 0 o 5 o 0 o 5 o ? 512k x 8 bit low power cmos sram october 2007 as6c4008 10/october/07, v.1.1 alliance memory inc. page 11 of 15
36 ball 6mm 8mm tfbg a pa c kage outline di m ension ? 512k x 8 bit low power cmos sram page 12 of 15
32 pin 600 m il p-di p package o u tline dimension note : d/e1/s dimension do not include mold flash. unit sym. inch(base) mm(ref) a1 0.001 (min) 0.254 (min) a2 0.150 0.005 3.810 0.127 b 0.018 0.005 0.457 0.127 d 1.650 0.005 41.910 0.127 e 0.600 0.010 15.240 0.254 e1 0.544 0.004 13.818 0.102 e 0.100 (typ) 2.540 (typ) eb 0.640 0.020 16.256 0.508. l 0.130 0.010 3.302 0.254 s 0.075 0.010 1.905 0.254 q1 0.070 0.005 1.778 0.127 ? 512k x 8 bit low power cmos sram page 13 of 15
ordering inform a tion a s 6 c 4 0 0 8 - 5 5 x x n t e m p e r a t u r e r a n g e : c = c o mm e r c i a l ( 0 o c t o + 7 0 o c) i = i n d u s t r i a l ( - 4 0 o t o + 8 5 o c) n = l e a d f r e e r o h s c o m p li a n t p a r t l o w p o w e r s r a m p r e f ix d e v i c e n u m b e r 4 0 = 4 m 0 8 = b y 8 a cc e s s t i m e p a c k a g e o p t i o n s : p = 3 2 p i n 6 0 0 m il p - dip s = 3 2 p i n 4 5 0 m il s o p t = 3 2 p i n t s o p -i ( 8 mm x 2 0 mm) s t = 3 2 p i n s t s o p ( 8 mm x 1 3 . 4 mm ) b = 3 6 p i n t f b g a ( 6 mm x 8 mm ) * * coming soon! ? p a r t n u m b e r in g s y s t e m a llia n c e o r g a n i z a t i o n v cc r a n g e p ac k a g e o p e r a t i n g t e m p s p eed n s a s 6 c40 0 8 - 55 p cn 512 k x 8 2 . 7 - 5 . 5 v 32pin 600mil pdip c o mm e r c i a l ~ 0 o c t o 70 o c 5 5 a s 6c40 0 8 - 5 5 s in 512 k x 8 2 . 7 - 5 . 5 v 32pin 450mil sop i ndu s t r i a l ~ - 40 o c t o 85 o c 5 5 a s 6c40 0 8 - 5 5 t in 512 k x 8 2 . 7 - 5 . 5 v 32pin tsop-i (8 x 20 mm) i ndu s t r i a l ~ - 40 o c t o 85 o c 5 5 a s 6c40 0 8 - 5 5 s t in 512 k x 8 2 . 7 - 5 . 5 v 32pin stsop (8 x 13.4 mm) i ndu s t r i a l ~ - 40 o c t o 85 o c 5 5 512 k x 8 2 . 7 - 5 . 5 v i ndu s t r i a l ~ - 40 o c t o 85 o c 5 5 a s 6c40 0 8 - 5 5 bin 36p i n t f b g a ( 6 mm x 8 mm ) * * c o m i n g soo n ! ordering codes 512k x 8 bit low power cmos sram october 2007 as6c4008 10/october/07, v.1.1 alliance memory inc. page 14 of 15
? ? alliance memory, inc. 1116 south amphlett , #2, san mateo, ca 94402 tel: 650-525-3737 fax: 650-525-0449 www.alliancememory.com copyright ? alliance memory all rights reserved part number: as6c4008 document version: v. 1. 1 ? copyright 2003 alliance memory, inc. all rights reserved. our three-point logo, our name and intelliwatt are trademarks or re gistered trademarks of alliance. all other brand and product names may be the trademarks of their respective companies. alliance reserves the right to make changes to this document and its products at any time without notice. alliance assumes no responsibility for any errors that may appear in this document. the data contained herein represents alliance's best data and/or estimates at the time of issuance. alliance reserves the right to chang e or correct this data at any time, without notice. if the product described herein is under development, significant changes to these specifications are pos sible. the information in this product data sheet is intended to be general descriptive information for potential customers and users, and is not intende d to operate as, or provide, any guarantee or warrantee to any user or customer. alliance do es not assume any responsibility or liability arising out of the application or use of any product described herein, and disclaims any express or implied warra nties related to the sale and/or use of alliance products including liability or warranties related to fitness for a particular purpose, merchantability, or infringement of any intellectual property rights, e xcept as express agreed to in alliance's terms and conditions of sale (which are available from alliance). all sales of alliance products are made exclusivel y according to alliance's terms and conditions of sale. the purchase of products from allia nce does not convey a license under any patent rights, copyrig hts; mask works rights, trademarks, or any other intellectual property rights of allianc e or third parties. alliance do es not authorize its products fo r use as critical components in life-supporting systems where a malfunction or failure may reasonabl y be expected to result in significant injury to the user, and the inclusion of alliance products in such life-supporting systems implies that the manufacturer assumes all risk of such use and agrees to inde mnify alliance against all claims arising from such use. page 15 of 15

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